Viveros-Wacher, AndrésRayas-Sánchez, José E.Brito-Brito, Zabdiel2019-08-292019-08-292019-06A. Viveros-Wacher, J. E. Rayas-Sánchez and Z. Brito-Brito, "Analog Gross Fault Identification in RF Circuits Using Neural Models and Constrained Parameter Extraction," in IEEE Transactions on Microwave Theory and Techniques, vol. 67, no. 6, pp. 2143-2150, June 2019. doi: 10.1109/TMTT.2019.29141060018-9480http://hdl.handle.net/11117/5997The demand and relevance of efficient analog fault diagnosis methods for modern RF and microwave integrated circuits increases with the growing need and complexity of analog and mixed-signal circuitry. The well-established digital fault diagnosis methods are insufficient for analog circuitry due to the intrinsic complexity in analog faults and their corresponding identification process. In this work, we present an artificial neural network (ANN) modeling approach to efficiently emulate the injection of analog faults in RF circuits. The resulting meta-model is used for fault identification by applying an optimization-based process using a constrained parameter extraction formulation. A generalized neural modeling formulation to include auxiliary measurements in the circuit is proposed. This generalized formulation significantly increases the uniqueness of the faults identification process. The proposed methodology is illustrated by two faulty analog circuits: a CMOS RF voltage amplifier and a reconfigurable bandpass microstrip filter.engAnalog FaultsArtificial Neural Networks (ANN)Gross FaultsFault IdentificationFault InjectionParameter Extractioninfo:eu-repo/semantics/article