| dc.contributor.author | Rayas-Sánchez, José E. | |
| dc.contributor.author | Chávez-Hurtado, José L. | |
| dc.contributor.author | Brito-Brito, Zabdiel | |
| dc.date.accessioned | 2016-03-02T17:31:20Z | |
| dc.date.available | 2016-03-02T17:31:20Z | |
| dc.date.issued | 2014-10 | |
| dc.identifier.citation | Chávez-Hurtado, J.L.; Rayas-Sánchez,E. and Brito-Brito, Z. “Reliable full-wave EM simulation of a single-layer SIW interconnect with transitions to microstrip lines,” in COMSOL Conf., Boston, MA, Oct. 2014, pp. 1-5. (DOI: 10.13140/RG.2.1.2579.1445). | es |
| dc.identifier.other | DOI: 10.13140/RG.2.1.2579.1445 | |
| dc.identifier.uri | http://hdl.handle.net/11117/3131 | |
| dc.description | We present a procedure to obtain reliable EM responses for a substrate integrated waveguide (SIW) interconnect with microstrip line transitions. The procedure focuses on two COMSOL configuration settings: meshing sizes and simulation bounding box. Once both are properly configured, the implemented structure is tested by perturbing the simulation bounding box to assure it has no effect on the EM responses | es |
| dc.description.sponsorship | ITESO, A.C. | es |
| dc.language.iso | eng | es |
| dc.publisher | COMSOL Conference | es |
| dc.relation.ispartofseries | COMSOL Conference; | |
| dc.rights.uri | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-2.5-MX.pdf | es |
| dc.subject | Simulation Bounding Box | es |
| dc.subject | Meshing Scheme | es |
| dc.subject | SIW | es |
| dc.subject | Microstrip Line | es |
| dc.subject | Interconnect | es |
| dc.subject | EM Simulation | es |
| dc.title | Reliable full-wave EM simulation of a single-layer SIW interconnect with transitions to microstrip lines | es |
| dc.type | info:eu-repo/semantics/conferencePaper | es |
| rei.revisor | COMSOL Conference | |
| rei.peerreviewed | Yes | es |
