| dc.contributor.author | Alejos-Jiménez, Jesús R. | |
| dc.date.accessioned | 2017-11-30T20:24:23Z | |
| dc.date.available | 2017-11-30T20:24:23Z | |
| dc.date.issued | 2017-11 | |
| dc.identifier.citation | Alejos-Jiménez, J. R. (2017). High-Frequency Electronic Design Optimization Using Simulated Annealing. Trabajo de obtención de grado, Maestría en Diseño Electrónico. Tlaquepaque, Jalisco: ITESO. | es |
| dc.identifier.uri | http://hdl.handle.net/11117/5114 | |
| dc.description | This thesis presents a methodology for improving the performance of the Simulated Annealing (SA) algorithm to optimize high-frequency electronic circuits. It starts by introducing the algorithm together with the fundamental concepts that support its functionality. Then, a set of new features are added to the SA algorithm to control its behavior, which include: knobs for controlling the step-size, search-space limits, and the functions that govern the evolution of the algorithm. The introduction of such features is accompanied by a set of experiments to demonstrate the functionality of the modified SA, and compare its performance against Nelder-Mead and Conjugated Gradients Fletcher-Reeves methods. This is followed by the definition and application of a methodology to configure the algorithm and improve its consistency and efficiency, accompanied by a test (optimization of a simple high-frequency filter) to verify its effectivity. Next, SA is configured to optimize a more complex circuit, consisting of a microstrip low-pass filter implemented in the full-wave electromagnetic simulator Sonnet. Finally, such optimization problem is solved by using other optimization algorithms (Nelder-Mead, Sequential Quadratic Programming, and Genetic Algorithm) to make an overall assessment of the proposed SA algorithm, identifying what kind of problems may take advantage of the features and improvements added to SA, or may expose its caveats. | es |
| dc.language.iso | eng | es |
| dc.publisher | ITESO | es |
| dc.rights.uri | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-2.5-MX.pdf | es |
| dc.subject | High-frequency Electronic Design | es |
| dc.subject | Simulated Annealing | es |
| dc.subject | Optimization | es |
| dc.title | High-Frequency Electronic Design Optimization Using Simulated Annealing | es |
| dc.type | info:eu-repo/semantics/masterThesis | es |
| dc.contributor.director | Rayas-Sánchez, José E. | |
| rei.peerreviewed | Yes | es |
