Viveros-Wacher, AndrésRayas-Sánchez, José E.2019-08-302019-08-302018-08A. Viveros-Wacher and J. E. Rayas-Sánchez, “Analog fault identification in RF circuits using artificial neural networks and constrained parameter extraction,” in IEEE MTT-S Int. Conf. Num. EM Mutiphysics Modeling Opt. (NEMO-2018), Reykjavik, Iceland, Aug. 2018, pp. 1-3. DOI: 10.1109/NEMO.2018.8503117978-1-5386-5205-3http://hdl.handle.net/11117/6007The increase of analog and mixed-signal circuitry in modern RF and microwave integrated circuits demands for improved analog fault diagnosis methods. While digital fault diagnosis is well established, the analog counterpart is relatively much less mature due to the intrinsic complexity in analog faults and their corresponding identification. In this work, we present an artificial neural network (ANN) modeling approach to efficiently emulate the injection of analog faults in RF circuits. The resulting meta-model is used for fault identification by applying an optimization-based process using a constrained parameter extraction formulation. The proposed methodology is illustrated by a faulty analog CMOS RF circuit.engAnalog FaultsArtificial Neural Networks (ANN)Parameter ExtractionGross FaultsFault InjectionFault Identificationinfo:eu-repo/semantics/article