Lomelí-Illescas, IsmaelSolís-Bustos, Sergio A.Martínez-Sánchez, Víctor H.Rayas-Sánchez, José E.2019-07-232016-10I. Lomelí-Illescas, S. A. Solís-Bustos, V. H. Martínez-Sánchez, and J. E. Rayas-Sánchez, “Synthesis tool for automatic layout generation of analog structures,” in IEEE ANDESCON Proc., Arequipa, Peru, Oct. 2016, pp. 1-4.978-1-5090-2532-9http://hdl.handle.net/11117/5943In this paper, a novel analog layout synthesis tool is presented. It is focused on two common analog building blocks: differential pairs and arrays of stacked devices. Starting from a circuit netlist and the names of the selected transistors, the tool verifies that these form a valid block and creates the corresponding layout. The user can define different layout parameters and the layout view can be generated with different levels of detail. Multiple layout views of a differential pair are generated to show its effectiveness to speed up the design process.engAnalog LayoutIntegrated CircuitCAD ToolNanometric Analog Layoutinfo:eu-repo/semantics/conferencePaper