A 0.18um CMOS linear Voltage-to-Time Converter for a Low Power 10-bit 200kS/s SAR ADC with Adaptive Conversion Cycle Oriented to Audio Applications
Figueroa-Vázquez, Cristian F.
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DescriptionThis document presents a 0.18 um CMOS process highly-linear Voltage-to-Time Converter (VTC) design that can operate at a low voltage of 1.8 V across PVT corners and with the power consumption of less than 13 uW and linearity error less than 1%. The VTC was designed to work at a minimum of 1.68 V and accepts a maximum clock frequency of 900 MHz; to reduce non-linear behavior a symmetric load and current starved inverter configuration was proposed. This circuit was designed using TSMC 0.18 um CMOS process technology.
ITESO, A. C.