Improving Harmonic Balance Performance via Parallelization
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Fecha
2016-09
Autores
García-BedoyTorres, Jorge
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ITESO
Resumen
Descripción
In this thesis, an approach to parallelizing the Harmonic Balance (HB) algorithm for circuit simulation is proposed. Initially, a description of the current state of the art for parallelization, as applied to Electronic Design Automation (EDA), is provided, along with an introduction to the Harmonic Balance algorithm. Previous work on parallelizing the HB algorithm is briefly presented. Next, the necessary netlist parsing infrastructure required for a circuit simulator is described and implemented through the use of regular expressions in Python and subsequently benchmarked against a variety of different circuits. Voltage and current plotting capabilities are also expanded upon at this stage. Afterwards, a more in-depth description of the HB algorithm is provided, explaining step-by-step the generation of the required matrices. Next, it comes a general overview of modern tools and languages used for scientific computing, with a particular focus on Python, culminating in an initial implementation of the HB algorithm in this language. Having developed a baseline circuit simulator implementing the HB algorithm, the different steps in the process are analyzed to identify good parallelization candidates, before making the necessary modifications to enable concurrent evaluation of the non-linear sub-circuit. Finally, a sample circuit with multiple non-linear elements is simulated to evaluate the computational speed-up from the parallelization effort.
Palabras clave
Harmonic Balance, Circuit Simulation, Parallelization
Citación
García-BedoyTorres, J. (2016). Improving Harmonic Balance Performance via Parallelization. Trabajo de obtención de grado, Maestría en Diseño Electrónico. Tlaquepaque, Jalisco: ITESO.