Analog Fault Identification in RF Circuits using Artificial Neural Networks and Constrained Parameter Extraction

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dc.contributor.authorViveros-Wacher, Andrés
dc.contributor.authorRayas-Sánchez, José E.
dc.date.accessioned2019-08-30T18:39:35Z
dc.date.available2019-08-30T18:39:35Z
dc.date.issued2018-08
dc.descriptionThe increase of analog and mixed-signal circuitry in modern RF and microwave integrated circuits demands for improved analog fault diagnosis methods. While digital fault diagnosis is well established, the analog counterpart is relatively much less mature due to the intrinsic complexity in analog faults and their corresponding identification. In this work, we present an artificial neural network (ANN) modeling approach to efficiently emulate the injection of analog faults in RF circuits. The resulting meta-model is used for fault identification by applying an optimization-based process using a constrained parameter extraction formulation. The proposed methodology is illustrated by a faulty analog CMOS RF circuit.es
dc.identifier.citationA. Viveros-Wacher and J. E. Rayas-Sánchez, “Analog fault identification in RF circuits using artificial neural networks and constrained parameter extraction,” in IEEE MTT-S Int. Conf. Num. EM Mutiphysics Modeling Opt. (NEMO-2018), Reykjavik, Iceland, Aug. 2018, pp. 1-3. DOI: 10.1109/NEMO.2018.8503117es
dc.identifier.isbn978-1-5386-5205-3
dc.identifier.urihttp://hdl.handle.net/11117/6007
dc.language.isoenges
dc.publisherIEEEes
dc.rights.urihttp://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdfes
dc.subjectAnalog Faultses
dc.subjectArtificial Neural Networks (ANN)es
dc.subjectParameter Extractiones
dc.subjectGross Faultses
dc.subjectFault Injectiones
dc.subjectFault Identificationes
dc.titleAnalog Fault Identification in RF Circuits using Artificial Neural Networks and Constrained Parameter Extractiones
dc.typeinfo:eu-repo/semantics/articlees
rei.peerreviewedYeses

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