Synthesis tool for automatic layout generation of analog structures
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Fecha
2016-10
Autores
Lomelí-Illescas, Ismael
Solís-Bustos, Sergio A.
Martínez-Sánchez, Víctor H.
Rayas-Sánchez, José E.
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Editor
IEEE
Resumen
Descripción
In this paper, a novel analog layout synthesis tool is presented. It is focused on two common analog building blocks: differential pairs and arrays of stacked devices. Starting from a circuit netlist and the names of the selected transistors, the tool verifies that these form a valid block and creates the corresponding layout. The user can define different layout parameters and the layout view can be generated with different levels of detail. Multiple layout views of a differential pair are generated to show its effectiveness to speed up the design process.
Palabras clave
Analog Layout, Integrated Circuit, CAD Tool, Nanometric Analog Layout
Citación
I. Lomelí-Illescas, S. A. Solís-Bustos, V. H. Martínez-Sánchez, and J. E. Rayas-Sánchez, “Synthesis tool for automatic layout generation of analog structures,” in IEEE ANDESCON Proc., Arequipa, Peru, Oct. 2016, pp. 1-4.