Integration of Transistor Aging Models across Different EDA Environments

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dc.contributor.authorVelarde-González, Fabio A.
dc.date.accessioned2019-10-23T21:55:33Z
dc.date.available2019-10-23T21:55:33Z
dc.date.issued2019-09
dc.descriptionThis thesis proposes an approach to consistently integrate transistor aging degradation models across different electronic design automation (EDA) environments, and studies the differences between the modeling approaches typically used to describe transistor degradation. First, an introduction to aging mechanisms in metal-oxide-silicon (MOS) transistors is provided, along with a description of the degradation effects: hot carrier injection (HCI) and bias temperature instability (BTI). Next, the degradation models typically used for circuit level simulation are reviewed along with the general aging simulation flow, explained in detail with the help of an example using the circuit simulator HSPICE. Afterwards, the problems associated with the built-in degradation models offered by the EDA vendors are discussed, revealing the necessity of implementing user defined models in order to achieve consistent aging simulations throughout different EDA environments, an important issue for semiconductor foundries wishing to deliver dependable process design kids (PDK) to integrated circuit (IC) designers. Application program interfaces (API) are a set of C-based data structures and functions that allow the implementation and integration of custom model into circuit simulators. This thesis analyzes the APIs offered by three major EDA vendors, in addition to the open model interface (OMI) API. Subsequently, a simulation study using examples of degradation models compares the aging simulation results obtained after their implementation in three different APIs and tested in two different circuit simulators, demonstrating the possibility of achieving consistent aging simulations results. Finally, this thesis analyzes and compares two modeling approaches used to describe transistor degradation: model card adaptation and subcircuits, highlighting the implications that these two modeling approaches have in aging simulation outcome and performance.es
dc.identifier.citationVelarde-González, F. A. (2019). Integration of Transistor Aging Models across Different EDA Environments. Trabajo de obtención de grado, Maestría en Diseño Electrónico. Tlaquepaque, Jalisco: ITESO.es
dc.identifier.urihttp://hdl.handle.net/11117/6063
dc.language.isoenges
dc.publisherITESOes
dc.rights.urihttp://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdfes
dc.subjectDegradación de Transistoreses
dc.subjectHot Carrier Injectiones
dc.subjectBias Temperature Instabilityes
dc.subjectMOSFETes
dc.subjectAging Simulationes
dc.subjectMicroelectrónicaes
dc.subjectSemiconductoreses
dc.subjectElectronic Design Automationes
dc.titleIntegration of Transistor Aging Models across Different EDA Environmentses
dc.typeinfo:eu-repo/semantics/masterThesises
rei.peerreviewedYeses
rei.revisorRayas-Sánchez, José E.

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