High-frequency circuit design using a neural space-mapping algorithm based on a two-layer perceptron with optimized nonlinearity
dc.contributor.author | Rayas-Sánchez, José E. | |
dc.contributor.author | Gutiérrez-Ayala, Vladimir | |
dc.date.accessioned | 2013-05-21T17:02:57Z | |
dc.date.available | 2013-05-21T17:02:57Z | |
dc.date.issued | 2006-11 | |
dc.description | In this work we present an improved version of the Neural Space-Mapping algorithm with regulated nonlinearity. The new version uses a nonlinear two-layer perceptron (2LP), instead of a three layer perceptron (3LP), to train the space-mapping (SM)-based neuromodel. The 2LP mapping nonlinearity is automatically regulated with classical optimization algorithms. Additionally, the new algorithm uses a different optimization method to train the SM-based neuromodel. With these three main improvements we obtain a more efficient and faster algorithm. In order to verify the algorithm performance, we design a stopband microstrip filter with quarter-wave resonant opens stubs, and a microstrip notch filter with mitered bends. Both circuits use a full-wave electromagnetic simulator. | es |
dc.description.sponsorship | ITESO, A.C. | es |
dc.description.sponsorship | Consejo Nacional de Ciencia y Tecnología | es |
dc.identifier.citation | V. Gutiérrez-Ayala and J. E. Rayas-Sánchez, “High-frequency circuit design using a neural space-mapping algorithm based on a two-layer perceptron with optimized nonlinearity,” in Int. Conf. on Electronic Design Proc. (ICED 2006), Veracruz, Mexico, Nov. 2006, pp. 90-95. | es |
dc.identifier.uri | http://hdl.handle.net/11117/590 | |
dc.language.iso | eng | es |
dc.publisher | International Conference on Electronic Design | es |
dc.relation.ispartofseries | International Conference on Electronic Design (ICED);2006 | |
dc.rights.uri | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdf | es |
dc.subject | Neural Space Mapping (NSM) | es |
dc.subject | High-frequency Circuits Design | es |
dc.title | High-frequency circuit design using a neural space-mapping algorithm based on a two-layer perceptron with optimized nonlinearity | es |
dc.type | info:eu-repo/semantics/conferencePaper | es |
rei.peerreviewed | Yes | es |
rei.revisor | International Conference on Electronic Design |
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