Design of a programmable CMOS Charge-Pump for phase-locked loop synthesizers

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dc.contributor.authorGómez-Cruz, Jorge
dc.contributor.authorSánchez-Hernández, Fernando
dc.contributor.authorGómez-Mora, Luis Guillermo
dc.contributor.authorJuárez-Hernández, Esdras
dc.contributor.authorMartínez-Guerrero, Esteban
dc.date.accessioned2013-06-10T14:46:49Z
dc.date.available2013-06-10T14:46:49Z
dc.date.issued2012-03
dc.descriptionA charge pump circuit capable of operating at different switching speed is presented. The switching speed control is added to a typical charge pump circuit by mean of enable switches which allow drive different currents. Charge pump circuit is implemented in AMI 0.5µm CMOS technology. Simulations were performed using Spectre from CadenceTM. Simulation results show clearly an increase in the slope of charging or discharging curves of load capacitor during the pumping-up and pumping-down phases.es
dc.description.sponsorshipITESO, A.C.es
dc.identifier.citationGomez-Cruz Jorge de Jesus, Design of a programmable CMOS Charge-Pump for phase-locked loop synthesizers, Procedia Technology 3 ( 2012 ) pp 235 – 240.es
dc.identifier.issn2212-0173
dc.identifier.urihttp://hdl.handle.net/11117/646
dc.language.isoenges
dc.publisherProcedia Technologyes
dc.relation.ispartofseriesProcedia technolgy;3
dc.rights.urihttp://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdfes
dc.subjectAnalog Electronic Designes
dc.subjectIntegrated Circuits; Charge Pumpes
dc.subjectPLLses
dc.subjectCircuit Simulationes
dc.titleDesign of a programmable CMOS Charge-Pump for phase-locked loop synthesizerses
dc.typeinfo:eu-repo/semantics/articlees
rei.peerreviewedYeses
rei.revisorProcedia technology

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