AI-Enhanced Post-Silicon Validation: Tackling Signal Integrity Issues in High-Speed Interconnects

Vista sencilla de ítem
dc.contributor.authorRangel-Patiño, Francisco
dc.contributor.authorVega-Ochoa, Edgar A.
dc.contributor.authorViveros-Wacher, Andres
dc.contributor.authorOnsongo, Daudi
dc.contributor.authorRayas-Sánchez, José E.
dc.date.accessioned2025-04-09T22:04:29Z
dc.date.available2025-04-09T22:04:29Z
dc.date.issued2025-01-23
dc.description.abstractSemiconductor technology advances, coupled with the demand for higher data rates and bandwidth, has led to significant signal integrity issues such as attenuation, crosstalk, jitter, noise, EM susceptibility, etc. Traditional post-silicon validation methods for high-performance computer platforms, which rely heavily on manual inspection and rule-based heuristics, are increasingly inadequate for addressing these complexities. In this paper, we review and highlight the application of artificial intelligence (AI) approaches and machine learning (ML) techniques to automate post-silicon validation and enhance the detection and diagnosis of signal integrity issues in high-speed computer interfaces. Through a series of case studies, we demonstrate the efficacy of various AI techniques, including artificial neural networks (ANNs), surrogate modeling, and unsupervised learning, in optimizing settings and improving the efficiency of post-silicon validation. These techniques significantly reduce the number of required measurements, enhance accuracy, and provide scalable and flexible solutions for modern post-silicon physical layer validation and tuning processes.
dc.description.sponsorshipITESO, A.C.es_MX
dc.identifier.citationF. E. Rangel-Patiño, E. A. Vega-Ochoa, A. Viveros-Wacher, D. Onsongo, and J. E. Rayas-Sanchez. AI-enhanced post-silicon validation: tackling signal integrity issues in high-speed interconnects, in IEEE MTT-S Latin America Microwave Conf. (LAMC-2025), San Juan, Puerto Rico, Jan. 2025, pp. 66-69.
dc.identifier.isbn979-8-3315-4041-8
dc.identifier.urihttps://hdl.handle.net/11117/11500
dc.language.isoeng
dc.publisherIEEE
dc.relation.ispartofseriesIEEE MTT-S Latin America Microwave Conference (LAMC-2025)
dc.rights.urihttps://creativecommons.org/licenses/by-nc-nd/4.0/deed.es
dc.subjectAI
dc.subjectANNs
dc.subjectGPR
dc.subjectHSIO
dc.subjectML
dc.subjectPCIe
dc.subjectSATA
dc.subjectAttenuation
dc.subjectCrosstalk
dc.subjectEqualization
dc.subjectHigh-speed Interconnects
dc.subjectJitter
dc.subjectK-means Clustering
dc.subjectNoise
dc.subjectOptimization
dc.subjectPost-silicon Validation
dc.subjectSignal Integrity
dc.subjectSpace Mapping
dc.subjectSurrogate Modeling
dc.subjectSystem Margining
dc.subjectUnsupervised Learning
dc.titleAI-Enhanced Post-Silicon Validation: Tackling Signal Integrity Issues in High-Speed Interconnects
dc.typeinfo:eu-repo/semantics/article
dc.type.versioninfo:eu-repo/semantics/publishedVersion

Archivos

Bloque original
Mostrando 1 - 1 de 1
Miniatura
Nombre:
Rangel_25Jan_AI-post-Si_valid_signal_integrity_issues_in_HSI_Author_ver.pdf
Tamaño:
604.57 KB
Formato:
Adobe Portable Document Format
Descargar

Colecciones

DESI - Artículos y ponencias con arbitraje